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Turion64 X2/DDR2 RAM Timing Advice Please?

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  • Mar 4th, 2009 4:51 am
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Turion64 X2/DDR2 RAM Timing Advice Please?

Ghetto_Child wrote:
Feb 12th, 2009 1:57 pm
Ran MemTest86 v3.3 on default tests using just 1x2GB Kingston module no other ram, it found a lot of errors. I went through the config options and found I can change memory timings within the MemTest86 running.

Here's the default settings I was presented with:
AMD64 Options
Rd-Wr Delay: 3
Wr-Rd Delay: 1
Rd/Wr Bypass: 2
Refresh Rate: 3.9us
Command Rate: 1T
Row Cycle Time: 9
RAS-RAS Delay: 2
Write Recovery: 3

I can also set tRCD, tRP, tRAS but the current values are not displayed.

Anyone know what values they should be for this ram? I'm running a Turion64 X2 TL-50 256K on an Acer Aspire 5050-5278. I think the ram defaults to DDR2-667.
The ram is Kingston 2GB DDR2-667 RMN2-667/2G. If anyone needs some part numbers off the DRAM chips themselves let me know I'll post them.
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7 replies
Deal Fanatic
Feb 11, 2005
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Just enable SPD/automatic timing; it will run the RAM at the fastest stable timings the module reports it will support.
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Jan 16, 2009
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Is it really worth the trouble for this....would there actually be any noticeable performance increase?
[OP]
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it's always worth it. CL or CAS transaction state occurs 50% of all transactions in ram. Reducing the value by 1 saves you the time of 1 system bus cycle and if your ram frequency is running faster than your system bus frequency that can turn into multiple cycles for the ram or multiple ram transactions.

For the average user it might be the difference between laggy video and smooth video or 1 more moderate-high load program running smoothly with the rest of existing running programs. I've seen a change in the value by 1 result in a up to a few 100MB/s bandwidth increase.

And when running vista every bit counts noticeably.

Anyway the ram is now running stable now so I'm convinced it's a BIOS bug resulting in strange memory totals.

Out of curiousity does anyone know any faster timings than what I posted for the AMD64 chipset timings?

Also the Memtest errors seem to occur if I don't manually set the upper memory limit to avoid the reserved memory and shared video memory.
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